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Data Packet Processing Model based on Multi-Core Architecture

Volume 14, Number 7, July 2018, pp. 1383-1390
DOI: 10.23940/ijpe.18.07.p1.13831390

Xian Zhanga,b, Dong Yina,b, Taiguo Qua,b, Jia Liua,b, and Yiwen Liua,b

aSchool of Computer Science and Engineering, Huaihua University, Huaihua, 418008, China
bKey Laboratory of Intelligent Control Technology for Wuling-Mountain Ecological Agriculture in Hunan Province, Huaihua, 418008, China

(Submitted on March 20, 2018; Revised on April 12, 2018; Accepted on June 23, 2018)

Abstract:

According to the characteristics of pipeline structure and multi-core processor structure for packet processing in network detection applications, the horizontal-based parallel architecture model and tree-based parallel architecture model are proposed for packet processing of Snort application. The principle of a tree-based parallel architecture model is to use pipelining and flow-pinning technology to design a processor that is specifically used to capture data packets, and other processors are responsible for other stages of parallel processing of the data packets. The experimental comparison and analysis show that the tree-based parallel architecture model has higher performance on the second-level cache hit ratio, throughput, CPU utilization, and inter-core load balancing compared to the horizontal-based parallel architecture model for packet processing of Snort application.

 

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